Two multiprocessor system-on-chip (MPSoC) architectures are proposed and compared in the paper with reference to audio and\r\nvideo processing applications. One architecture exploits a homogeneous topology; it consists of 8 identical tiles, each made of a 32-\r\nbit RISC core enhanced by a 64-bit DSP coprocessor with local memory. The other MPSoC architecture exploits a heterogeneoustile\r\ntopology with on-chip distributed memory resources; the tiles act as application specific processors supporting a different\r\nclass of algorithms. In both architectures, the multiple tiles are interconnected by a network-on-chip (NoC) infrastructure,\r\nthrough network interfaces and routers, which allows parallel operations of the multiple tiles. The functional performances and\r\nthe implementation complexity of the NoC-based MPSoC architectures are assessed by synthesis results in submicron CMOS\r\ntechnology. Among the large set of supported algorithms, two case studies are considered: the real-time implementation of an\r\nH.264/MPEG AVC video codec and of a low-distortion digital audio amplifier. The heterogeneous architecture ensures a higher\r\npower efficiency and a smaller area occupation and is more suited for low-powermultimedia processing, such as in mobile devices.\r\nThe homogeneous scheme allows for a higher flexibility and easier system scalability and is more suited for general-purpose DSP\r\ntasks in power-supplied devices.
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